A CMOS adiabatic logic for low power circuit design

Author

Song, Hee-sup ; Kang, Jin-Ku

Author_Institution

Dept. of Electron. Eng., Inha Univ., Incheon, South Korea

fYear

2004

Firstpage

348

Lastpage

351

Abstract

In this paper, we designed the low power energy recovery circuit using the adiabatic method. The circuit avoids non-abiabatic loss using the output to ground path current control technique by the output signal. Since the circuit operates low frequency (down to 200MHz), we can save the power consumption than other adiabatic circuit. Proposed circuit was designed using TSMC 0.35μm CMOS Technology. Simulation result shows that the circuit can be operating up to 400MHz.

Keywords

CMOS logic circuits; VLSI; bootstrap circuits; flip-flops; integrated circuit design; low-power electronics; CMOS adiabatic logic; VLSI circuits; advanced function block; cascade gate; inherent pipelining; inverter; low power circuit design; low power energy recovery circuit; multiphase method; output to ground path current control; pass-transistor logic path; CMOS logic circuits; Circuit synthesis; Energy consumption; Frequency; Inverters; Latches; Logic design; Power dissipation; Power supplies; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Advanced System Integrated Circuits 2004. Proceedings of 2004 IEEE Asia-Pacific Conference on

Print_ISBN

0-7803-8637-X

Type

conf

DOI

10.1109/APASIC.2004.1349493

Filename

1349493

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1701987