DocumentCode :
1702001
Title :
High temperature die-attach effects on die stresses
Author :
Lin, Shun-Tien ; Benoit, Jeffrey T. ; Grzybowski, Richard R. ; Zou, Yida ; Suhling, Jeffrey C. ; Jaeger, Richard C.
Author_Institution :
United Technol. Res. Center, East Hartford, CT, USA
fYear :
1998
Firstpage :
61
Lastpage :
67
Abstract :
Mechanical stresses in the die attach assembly of a microelectronic package can cause component failure through various failure mechanisms due to microcracks, voids, and other defects in the die and attachment materials. These stresses are often thermally-induced during manufacture, test, storage, and operation. The stresses can be significantly affected by die-attach adhesives. To achieve reliable electronic packaging, the selection of die attach material becomes critical. In this paper, special (111) silicon stress test chips containing an array of piezoresistive sensor rosettes have been applied to 281-pin ceramic PGA (pin grid array) packages. The test chips contain optimized eight element dual polarity rosettes which are uniquely capable of evaluating the complete stress state at points on the surface of the die. Calibrated and characterized test chips were attached to the PGA packages using silver/glass type of adhesives. The resistance of the sensors before and after die attachment was recorded at room temperature. The thermal stresses at sites on the die surface after die attachment have been calculated using the measured resistance changes and piezoresistive theory. The comparison of die stresses caused by different die-attach materials has been made. Radius of curvature (ROC) measurements were also conducted using the same PGA packages and the results were correlated with the die stress measurements. In addition, three-dimensional finite element simulations of the PGA packages were performed, and the stress predictions were correlated with the experimental test chip data
Keywords :
adhesives; ceramic packaging; finite element analysis; high-temperature electronics; integrated circuit packaging; microassembling; thermal stress cracking; thermal stresses; voids (solid); ceramic PGA; component failure; die stresses; die-attach adhesives; dual polarity rosettes; failure mechanisms; high temperature die-attach effects; mechanical stresses; microcracks; piezoresistive sensor rosettes; piezoresistive theory; radius of curvature measurements; reliable electronic packaging; stress predictions; thermal stresses; three-dimensional finite element simulations; voids; Electronic packaging thermal management; Electronics packaging; Microassembly; Piezoresistance; Sensor arrays; Stress measurement; Surface resistance; Temperature; Testing; Thermal stresses;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
High Temperature Electronics Conference, 1998. HITEC. 1998 Fourth International
Conference_Location :
Albuquerque, NM
Print_ISBN :
0-7803-4540-1
Type :
conf
DOI :
10.1109/HITEC.1998.678199
Filename :
678199
Link To Document :
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