DocumentCode
1702180
Title
A nonlinear phase detector for digital phase locked loops
Author
Hsieh, Ping-Hsuan ; Maxey, Jay ; Yang, Chih-Kong Ken
Author_Institution
Univ. of California, Los Angeles, CA, USA
fYear
2009
Firstpage
335
Lastpage
338
Abstract
This paper examines several transfer curves of the phase detector in a digital phase-locked loop and illustrates the benefits of applying non-linearity to the phase transfer characteristics. Taking advantage of the programmability of the digital implementation, the proposed technique shows a better trade-off between the acquisition speed and the steady-state dithering jitter performance.
Keywords
digital phase locked loops; jitter; phase detectors; digital phase locked loop; nonlinear phase detector; phase transfer characteristics; steady-state dithering jitter; transfer curve; Detectors; Jitter; Phase detection; Phase locked loops; Steady-state; digital phase-locked loop; phase detector; time-to-digital converter;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 2009. CICC '09. IEEE
Conference_Location
San Jose, CA
Print_ISBN
978-1-4244-4071-9
Electronic_ISBN
978-1-4244-4073-3
Type
conf
DOI
10.1109/CICC.2009.5280833
Filename
5280833
Link To Document