• DocumentCode
    1702185
  • Title

    A 1.6 V 80 μW rail-to-rail constant-GM bipolar adaptive biased op-amp input stage

  • Author

    Cardarilli, G.C. ; Ferri, G.

  • Author_Institution
    Dept. of Electron., Univ. of Rome Tor Vergata, Italy
  • Volume
    1
  • fYear
    1998
  • Firstpage
    452
  • Abstract
    In the design of operational amplifiers, adaptive biasing topologies help to optimise the trade off between speed characteristics and power consumption. In fact, they give an output current dependent on the input differential voltage, minimising the stand-by current. All the adaptive biasing solutions presented in literature require an extra quiescent current and, consequently, an additional static power dissipation. In this paper, this problem is overcome by an innovative adaptive biasing topology, which is here proposed and utilized as an application to a traditional constant transconductance rail-to-rail input stage of a low-voltage (1.6 V) low-power (80 μW) bipolar operational amplifier
  • Keywords
    bipolar analogue integrated circuits; differential amplifiers; integrated circuit design; operational amplifiers; 1.6 V; 80 muW; adaptive biasing topologies; bipolar operational amplifier; constant transconductance rail-to-rail input stage; input differential voltage; low-power circuits; low-voltage circuits; output current; power consumption; quiescent current; speed characteristics; stand-by current; Design optimization; Energy consumption; Operational amplifiers; Power amplifiers; Power dissipation; Rail to rail amplifiers; Rail to rail operation; Topology; Transconductance; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
  • Conference_Location
    Monterey, CA
  • Print_ISBN
    0-7803-4455-3
  • Type

    conf

  • DOI
    10.1109/ISCAS.1998.704488
  • Filename
    704488