Title :
Capacitance extraction for the nanoscale on-chip interconnects
Author :
Goel, Ashok K. ; Gopinathannair, Harikumar
Author_Institution :
Dept. of Electr. & Comput. Eng., Michigan Technol. Univ., Houghton, MI, USA
Abstract :
Single-level and multipath interconnect structures embedded in dielectrics on a silicon substrate are designed for simulation and capacitance extractions for these nanoscale 3D structures are done using the SILVACO TCAD tools. Simulation results are used to study the dependences of the ground and coupling capacitances on the permittivity of the dielectric material used and the thickness of the overlapping dielectric in addition to the geometry of the interconnect structure.
Keywords :
capacitance; dielectric materials; integrated circuit interconnections; nanotechnology; permittivity; silicon; technology CAD (electronics); SILVACO TCAD tool; capacitance extraction; coupling capacitance; dielectric material permittivity; ground capacitance; nanoscale on-chip interconnects; overlapping dielectric; Capacitance; Computational geometry; Computational modeling; Dielectric materials; Dielectric substrates; Integrated circuit interconnections; Integrated circuit technology; Permittivity; Silicon; Solid modeling;
Conference_Titel :
Semiconductor Electronics, 2004. ICSE 2004. IEEE International Conference on
Print_ISBN :
0-7803-8658-2
DOI :
10.1109/SMELEC.2004.1620850
