Title :
High speed and low power global interconnect IP with differential transmission line and driver-receiver circuits
Author :
Gomi, Shinichiro ; Nakamura, Kohichi ; Ito, Hiroyuki ; Okada, Kenichi ; Masu, Kazuya
Author_Institution :
Precision & Intelligence Lab., Tokyo Inst. of Technol., Yokohama, Japan
Abstract :
In Si ULSI, the transmission line can be realized by using the inductance of interconnects. In this paper, we design and report driver and receiver circuits for the differential transmission line, which achieve high speed and low power consumption for global interconnect. The delay time and power consumption are evaluated at 2GHz signal frequency. RLC differential transmission line is faster than RC line when interconnect length is over 4mm. RLC line has lower power consumption than RC line over 16mm.
Keywords :
CMOS integrated circuits; RLC circuits; ULSI; driver circuits; integrated circuit interconnections; integrated circuit layout; low-power electronics; CMOS; RLC transmission line; ULSI; differential transmission line; driver circuits; global interconnect; high speed; input inverter; level shifter; low power consumption; receiver circuits; Delay effects; Distributed parameter circuits; Driver circuits; Energy consumption; Frequency; Inductance; Integrated circuit interconnections; Power transmission lines; RLC circuits; Ultra large scale integration;
Conference_Titel :
Advanced System Integrated Circuits 2004. Proceedings of 2004 IEEE Asia-Pacific Conference on
Print_ISBN :
0-7803-8637-X
DOI :
10.1109/APASIC.2004.1349505