Title :
A neuron MOS variable logic circuit with the simplified circuit structure
Author :
Ishikawa, Yohei ; Fukai, Sumio
Author_Institution :
Fac. of Sci. & Eng., Saga Univ., Japan
Abstract :
A simple design of a variable logic circuit using neuron MOS transistors is proposed in this paper. The proposed circuit can be constructed with two-stage neuron MOS inverters. The circuit structure is simplified, and the circuit size can also be miniaturized. The validity of the proposed circuit is confirmed through HSPICE simulation and chip fabrication.
Keywords :
CMOS analogue integrated circuits; CMOS logic circuits; SPICE; VLSI; circuit simulation; neural chips; CMOS device parameters; HSPICE simulation; chip fabrication; circuit control technique; dynamic reconfiguration circuit; floating-gate capacitance ratio; neuron MOS variable logic circuit; simplified circuit structure; two-stage MOS inverters; Chip scale packaging; Circuit simulation; Educational programs; Frequency synchronization; Inverters; Logic circuits; Logic functions; MOSFETs; Neurons; Very large scale integration;
Conference_Titel :
Advanced System Integrated Circuits 2004. Proceedings of 2004 IEEE Asia-Pacific Conference on
Print_ISBN :
0-7803-8637-X
DOI :
10.1109/APASIC.2004.1349526
