A design of transponder IC for highly collision resistive RFID systems

Author

Fukumizu, Yohei ; Nagata, Makoto ; Ohno, Shuji ; Taki, Kazuo

Author_Institution

Graduate Sch. of Sci. & Technol., Kobe Univ., Japan

fYear

2004

Firstpage

438

Lastpage

439

Abstract

The RFID system is attracting attentions in the field of automatic identification. Especially, they need a system that can identify a thousand of tags at a time in practical use. We proposed a communication scheme in combination of time hopping CDMA, CRC error-detecting, and repetition of transmission for error recovery to resolve collision problems by simple circuits. The scheme realizes identification of a thousand in 300 msec with low error rate of 1.214 × 10^-11. This paper presents an experimental tag circuit which achieves low power operation of 23.4 μW with the core area of 12520 μm².

Keywords

CMOS integrated circuits; SPICE; code division multiple access; cyclic redundancy check codes; identification technology; integrated circuit layout; low-power electronics; mixed analogue-digital integrated circuits; radiofrequency integrated circuits; transponders; 23.4 muW; CMOS standard cell; CRC error-detecting; HSPICE; IC layout; LC circuit; analog circuit; automatic identification; circuit specification; digital logic; error recovery; highly collision resistive RFID systems; low error rate; low power operation; time hopping CDMA; transmission repetition; transponder IC design; Analog circuits; CMOS logic circuits; Circuit simulation; Coupling circuits; Cyclic redundancy check; Design engineering; Digital circuits; Multiaccess communication; Radiofrequency identification; Transponders;

fLanguage

English

Publisher

ieee

Conference_Titel

Advanced System Integrated Circuits 2004. Proceedings of 2004 IEEE Asia-Pacific Conference on

Print_ISBN

0-7803-8637-X

Type

conf

DOI

10.1109/APASIC.2004.1349527

Filename

1349527