DocumentCode :
1703126
Title :
A plug&play approach to data acquisition
Author :
Toledo, J. ; Muller, Holger ; Buytaert, J. ; Bal, F. ; David, A. ; Guirao, A. ; Mora, F.J.
Author_Institution :
Dept. of Electron. Eng., Univ. Politecnica de Valencia, Spain
Volume :
1
fYear :
2001
Firstpage :
506
Abstract :
Backplane buses are becoming a legacy for high rate, high volume data processing applications. Higher efficiency at lower cost is offered by the PCI bus technology, compared to crate-embedded processors. Becoming part of the plug&play domain of the host´s operating system, no additional data transfer protocols are needed. We have combined the PCI technology with high-density FPGA logic and common mezzanine standards on a flexible PCI card. First applications cover readout controllers for legacy bus protocols, high-speed link I/O and fast analog input data conversion. A field programmable gate array (FPGA) with embedded PCI master/target core serves as programmable interface between the PCI bus, mezzanine cards and a local SDRAM. Adapter mezzanine cards, implemented according to the IEEE P1386 or similar common standards, are used for level conversion, trigger interfacing or preprocessing. The application-dependent controller functions as well as SDRAM and PCI interfacing are handled by FPGA logic. A Linux driver was developed to achieve high bandwidth via CPU-initiated transfers. Control software for Windows and an interface for LabView target control and monitoring applications via graphical interfaces. First experience and applications will be reported.
Keywords :
PLD programming; application specific integrated circuits; data acquisition; device drivers; field programmable gate arrays; graphical user interfaces; high energy physics instrumentation computing; nuclear electronics; operating systems (computers); physical instrumentation control; readout electronics; system buses; trigger circuits; IEEE P1386; LabView target control; Linux driver; PCI bus technology; SDRAM; Windows; application-dependent controller functions; backplane buses; common mezzanine standards; control software; crate-embedded processors; data acquisition; fast analog input data conversion; field programmable gate array; graphical interfaces; high rate high volume data processing; high-density FPGA logic; high-speed link I/O; operating system; plug&play approach; programmable interface; readout controllers; target core; trigger interfacing; used for level conversion; Application software; Backplanes; Costs; Data acquisition; Data processing; Field programmable gate arrays; Logic; Operating systems; Protocols; SDRAM;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nuclear Science Symposium Conference Record, 2001 IEEE
ISSN :
1082-3654
Print_ISBN :
0-7803-7324-3
Type :
conf
DOI :
10.1109/NSSMIC.2001.1008508
Filename :
1008508
Link To Document :
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