DocumentCode
1703811
Title
Reliability of circuit-level simulation
Author
Nichols, K.G. ; Lin, J.T. ; Brown, A.D. ; Kazmierski, T.J. ; Zwolinski, M.
Author_Institution
Dept. of Electron. & Comput. Sci., Southampton Univ., UK
fYear
1993
fDate
6/30/1993 12:00:00 AM
Firstpage
42370
Lastpage
42373
Abstract
Three issues affect the reliability of circuit-level simulation. They are numerical stability of integration, precision of results at each time step and convergence at each time step. The method underlying simulation is first the formulation of a coupled set of nonlinear first-order differential equations representing the behaviour of the interconnected set of devices comprising the circuit. Second, the replacement of the time derivatives in the differential equations by finite-difference approximations (known as integration formulae) which discretise time, in general, in a nonuniform way. This step transforms the nonlinear differential equations, at each discretised time point, into a time-independent set of nonlinear equations. The third step is to solve the nonlinear equations, at each discretised time, by the Newton-Raphson technique which approximates them with a linear set of equations based on an initial estimate of the solution. Repeated solution of the linear set, with appropriate adjustments to the linear equation set coefficients after each solution, is used to refine the solution estimate until it is deemed that adequate precision of solution has been achieved
Keywords
circuit CAD; convergence of numerical methods; digital simulation; nonlinear differential equations; reliability; Newton-Raphson technique; circuit-level simulation; convergence; differential equations; finite-difference approximations; integration formulae; interconnected set; linear equation set coefficients; nonlinear equations; nonlinear first-order differential equations; numerical stability; precision; reliability; time derivatives; time step; time-independent set;
fLanguage
English
Publisher
iet
Conference_Titel
SPICE: Surviving Problems in Circuit Evaluation, IEE Colloquium on
Conference_Location
London
Type
conf
Filename
280377
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