Title :
A 1.8V, 14.5mW 2nd order passive wideband sigma-delta modulator
Author :
Wang, Fuyue ; Meng, Qiao ; Liang, Yong
Author_Institution :
Inst. of RF- & OE-ICs, Southeast Univ., Nanjing, China
Abstract :
In this paper, a passive 2nd order lowpass continuous time sigma-delta modulator is presented. An RLC filter is used in the modulator to replace the integrator so that the sampling frequency is not limited by the op-amp of the integrator. The system is analyzed and simulated in matlab, and a circuit using this method was accomplished with TSMC 0.18 μm CMOS technology. The peak SNR can reach 67 dB and 43 dB, respectively, at system level and circuit level when the bandwidth is 10 MHz.
Keywords :
CMOS integrated circuits; RLC circuits; low-pass filters; passive filters; sigma-delta modulation; 0.18 micron; 1 GHz; 1.8 V; 10 MHz; 14.5 mW; CMOS; RLC filter; continuous time sigma-delta modulator; passive wideband sigma-delta modulator; peak SNR; sampling frequency; second order lowpass sigma-delta modulator; Analytical models; CMOS technology; Circuit simulation; Delta-sigma modulation; Filters; Frequency; Operational amplifiers; RLC circuits; Sampling methods; Wideband;
Conference_Titel :
Communications, Circuits and Systems, 2005. Proceedings. 2005 International Conference on
Print_ISBN :
0-7803-9015-6
DOI :
10.1109/ICCCAS.2005.1495298
