DocumentCode :
1703890
Title :
PENTAG-a Petri net based automatic test pattern generator for sequential digital circuits
Author :
Witts, G. ; Alshahib, I.
Author_Institution :
Sch. of Eng., Oxford Brookes Univ., UK
fYear :
1993
fDate :
5/28/1993 12:00:00 AM
Firstpage :
42644
Lastpage :
42648
Abstract :
Describes an automatic test pattern generation program for sequential digital circuits using a modified implementation of Petri nets. This is achieved by the insertion of a FAN transition to the Petri net model. The resultant system compares favourably (12% more coverage and 30% faster) with similar ATPG programs based on the established D-algorithm path sensitization technique
Keywords :
Petri nets; automatic testing; integrated circuit testing; logic testing; sequential circuits; ATPG programs; FAN transition; Petri net; automatic test pattern generator; coverage; sequential digital circuits;
fLanguage :
English
Publisher :
iet
Conference_Titel :
Testing-the Gordian Knot of VLSI Design, IEE Colloquium on
Conference_Location :
London
Type :
conf
Filename :
280383
Link To Document :
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