Title :
PhD forum: BiSeeMos: A fast embedded stereo smart camera
Author :
Pelissier, Frantz ; Berry, François
Author_Institution :
LASMEA, Clermont-Ferrand, France
Abstract :
This paper presents a new embedded stereo vision system called BiSeeMos. This system has been designed for fast stereo vision computation up to 160 frames per second at a resolution of 1024 by 1024 pixels. The system´s heart is a Cyclone III FPGA from ALTERA Corporation with 119,088 reconfigurable logic elements, 3,888 Kbits of memory and 288 embedded multipliers. A versatile vision framework has been implemented in the system along with a Census stereo vision algorithm to validate the platform.
Keywords :
field programmable gate arrays; image sensors; intelligent sensors; stereo image processing; BiSeeMos; Census stereo vision algorithm; Cyclone III FPGA; embedded stereo vision system; fast embedded stereo smart camera; fast stereo vision computation; Computer architecture; Conferences; Cyclones; Field programmable gate arrays; Real time systems; Smart cameras; Stereo vision;
Conference_Titel :
Distributed Smart Cameras (ICDSC), 2011 Fifth ACM/IEEE International Conference on
Conference_Location :
Ghent
Print_ISBN :
978-1-4577-1708-6
Electronic_ISBN :
978-1-4577-1706-2
DOI :
10.1109/ICDSC.2011.6042960
