Abstract :
The new XC3100 family of static RAM based FPGAs from Xilinx provides the same advantages in terms of initial cost, time to market, reprogrammability and low risk design as Xilinx existing XC2000, XC3000 and XC4000/4000A/4000H families of FPGAs. However the parts have been optimised at a silicon level for high performance, and open the way to designs running with a system clock of up to 80 MHz, and even beyond. The new devices retain the architecture of the familiar XC3000 family, thus allowing designers to take advantage of their existing designs and design expertise. Pin-out and bitstream compatibility with the existing devices ensure that the transition to the new family, where it is required, will be as painless as possible. In addition a completely new family member, the XC3195 is now available. This device contains a nominal 13500 gates, thus allowing typical utilisations of around 7000 to 9000 gates. This compares with the nominal 9000 and usable 5000 to 7500 gates of the largest XC3000 family member, the XC3090