DocumentCode :
170458
Title :
Packet classification using binary Content Addressable Memory
Author :
Liu, Alex X. ; Meiners, Chad R. ; Torng, Eric
Author_Institution :
Dept. of Comput. Sci. & Eng., Michigan State Univ., East Lansing, MI, USA
fYear :
2014
fDate :
April 27 2014-May 2 2014
Firstpage :
628
Lastpage :
636
Abstract :
Packet classification is the core mechanism that enables many networking devices. Although using Ternary Content Addressable Memories (TCAMs) to perform high speed packet classification has become the widely adopted solution, TCAMs are very expensive, have limited capacity, consume large amounts of power, and generate tremendous amounts of heat because of their extremely dense and parallel circuitry. In this paper, we propose the first packet classification scheme that uses Binary Content Addressable Memories (BCAMs). BCAMs are similar to TCAMs except that in BCAMs, every bit has only two possible states: 0 or 1; in contrast, in TCAMs, every bit has three possible states: 0, 1, or * (don´t care). Because of the high complexity in implementing the extra “don´t care” state, TCAMs have much higher circuit density than BCAMs. As the power consumption, heat generation, and price grow non-linearly with circuit density, BCAMs consume much less power, generate much less heat, and cost much less money than TCAMs. Our BCAM based packet classification scheme is built on two key ideas. First, we break a multi-dimensional lookup into a series of one-dimensional lookups. Second, for each one-dimensional lookup, we convert the ternary matching problem into a binary string exact matching problem. To speed up the lookup process, we propose a number of optimization techniques including skip lists, free expansion, minimizing maximum lookup time, minimizing average lookup time, and lookup short circuiting. We evaluated our BCAM scheme on 17 real-life packet classifiers. On these classifiers, our BCAM scheme requires roughly 5 times fewer CAM bits than the traditional TCAM based scheme. The penalty is a throughput that is roughly 4 times less.
Keywords :
circuit optimisation; content-addressable storage; pattern classification; power consumption; string matching; BCAMs; TCAMs; average lookup time minimization; binary content addressable memory; binary string exact matching problem; circuit density; don´t care state; free expansion; heat generation; high speed packet classification; maximum lookup time minimization; multidimensional lookup; networking devices; optimization techniques; packet classification scheme; parallel circuitry; power consumption; price; skip lists; ternary matching problem; Associative memory; Computer aided manufacturing; Computers; Conferences; Ports (Computers); Throughput; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
INFOCOM, 2014 Proceedings IEEE
Conference_Location :
Toronto, ON
Type :
conf
DOI :
10.1109/INFOCOM.2014.6847988
Filename :
6847988
Link To Document :
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