DocumentCode :
1704709
Title :
Congestion driven incremental placement algorithm based on network flow
Author :
Luo, Lijuan ; Zhou, Qiang ; Hong, Xianlong
Author_Institution :
Dept. Of Comput. Sci. & Technol., Tsinghua Univ., Beijing, China
Volume :
2
fYear :
2005
Lastpage :
1252
Abstract :
Congestion is an important problem in VLSI physical design. The paper presents a new incremental placement to reduce local routing congestion with a global view. A minimum-cost flow problem is formulated to balance routing requirement globally, and reduce congestion with minimum deviation from input placement. Besides, a similar network flow method is adopted to remove row overflow and a heuristics, called crucial-part-first, is employed to resolve overlaps. Experimental results show that this algorithm can considerably reduce routing congestion with little wire-length sacrifice of initial placement.
Keywords :
VLSI; integrated circuit interconnections; integrated circuit layout; network routing; VLSI physical design; congestion driven incremental placement algorithm; crucial-part-first heuristics; local routing congestion; minimum-cost flow problem; network flow; Circuit synthesis; Computer science; Design optimization; Integer linear programming; Predictive models; Routing; Timing; Very large scale integration; Wire; Wiring;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications, Circuits and Systems, 2005. Proceedings. 2005 International Conference on
Print_ISBN :
0-7803-9015-6
Type :
conf
DOI :
10.1109/ICCCAS.2005.1495333
Filename :
1495333
Link To Document :
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