Digital modelling for op-amp circuit test

This paper presents a logic-based test method to expose catastrophic defects for analogue circuits that requires no built-in sensor or circuit partitioning. Investigation includes coupling the proposed technique with power supply voltage control test to increase the changes of faulty characteristics to be propagated to the primary output. Analysis of operating points of the circuit under test (CUT) is also presented. Load effect that might affect the fault coverage of the CUT was also taken under consideration for some of undetected defects. Amongst the advantages of this method are a logic-based test that could be integrated with digital tester, test time significantly reduced and less memory consumption.