DocumentCode
1705486
Title
Predictive sequential associative cache
Author
Calder, Brad ; Grunwald, Dirk ; Emer, Joel
Author_Institution
Dept. of Comput. Sci., Colorado Univ., Boulder, CO, USA
fYear
1996
Firstpage
244
Lastpage
253
Abstract
In this paper we propose a cache design that provides the same miss rate as a two-way set associative cache, but with an access time closer to a direct-mapped cache. As with other designs, a traditional direct-mapped cache is conceptually partitioned into multiple banks, and the blocks in each set are probed, or examined, sequentially. Other designs either probe the set in a fixed order or add extra delay in the access path for all accesses. We use prediction sources to guide the cache examination, reducing the amount of searching and thus the average access latency. A variety of accurate prediction sources are considered, with some being available in early pipeline stages. We feel that our design offers the same or better performance and is easier to implement than previous designs
Keywords
content-addressable storage; memory architecture; storage management; access latency; access time; direct-mapped cache; miss rate; prediction sources; predictive sequential associative cache; Added delay; Computer science; Delay effects; Pipelines; Probes; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
High-Performance Computer Architecture, 1996. Proceedings., Second International Symposium on
Conference_Location
San Jose, CA
Print_ISBN
0-8186-7237-4
Type
conf
DOI
10.1109/HPCA.1996.501190
Filename
501190
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