Title :
Design tools and circuit solutions for degradation-resilient analog circuits in nanometer CMOS
Author_Institution :
Dept. Elektrotechniek, Katholieke Univ. Leuven, Leuven
Abstract :
With the advanced scaling of CMOS technology in the nanometer range, highly integrated mixed-signal systems can be designed. The use of nanometer CMOS, however, poses many challenges. This keynote presentation gives an overview of problems due to increased variability and reliability. Both have to be addressed by the designer, either at IC design time or through reconfiguration at IC run time. Design tools for the efficient analysis and identification of reliability problems in analog circuits is described. Also, run-time circuit adaptation techniques are presented that allow a circuit to recover from degradation failures.
Keywords :
CMOS analogue integrated circuits; integrated circuit design; integrated circuit reliability; nanoelectronics; circuit reliability; failure degradation recovery; integrated mixed-signal system; nanometer CMOS analog circuit design; run-time circuit adaptation technique; Analog circuits; CMOS analog integrated circuits; CMOS technology; Circuit testing; Degradation; Design automation; Integrated circuit reliability; Integrated circuit technology; Mixed analog digital integrated circuits; Runtime;
Conference_Titel :
Design and Diagnostics of Electronic Circuits & Systems, 2009. DDECS '09. 12th International Symposium on
Conference_Location :
Liberec
Print_ISBN :
978-1-4244-3341-4
Electronic_ISBN :
978-1-4244-3340-7
DOI :
10.1109/DDECS.2009.5012084
