Fast Memory Region: 3D DRAM memory concept evaluated for JPEG2000 algorithm

3D stacking technology provides defined connection impedance and wide and flexible interface. These options enable new architecture approaches and memory concepts for DRAM layers. The most important findings on memory usage is locality principle. This principle is formulated as thumb rule therefore exact rate requires measure for given application using trace driven simulations. This big overhead is useless if application is unknown. Averaging and estimation offer solutions here. This work presents Fast Memory Region - a memory concept that provides an universal 3D DRAM hardware architecture that exploits locality principle for any application. The configuration step, in contrast to cache, is located in software. We evaluate the concept on JPEG2000 algorithm and show that, for encoder procedure execution, all necessary measure data can be extracted from short trace driven simulation runs. Simulations results show 5% reduction of run time overhead compared to cache acceleration only.