Optimization concepts for self-healing asynchronous circuits

Decreasing feature size and lower supply voltage cause integrated circuits to be more error-prone, during production as well as during runtime. At the same time the demand for higher reliability is increasing. In particular for applications with long mission times and where no repair is possible, complex fault tolerance mechanisms are required, leading to a dramatic increase of design and system costs. Runtime reconfiguration seems to be a promising way to obtain a circuit which is able to handle these challenges. In previous papers we presented a self-healing approach based on asynchronous Four-State Logic (FSL) and using reconfigurable circuit elements, called Self-Healing Cells (SHCs). These SHCs allow to bypass defect resources and to recover from multiple permanent faults. While the combinational logic can be easily reconfigured this way, the application of SHCs in an asynchronous pipeline requires special treatment of the handshake signals. In this paper we present a self-healing pipeline architecture and analyse different SHC architectures with respect to resource occupation, fault tolerance and reconfiguration speed.