• DocumentCode
    1706900
  • Title

    Adaptive cancellation of gain and nonlinearity errors in pipelined ADCs

  • Author

    Miyahara, Y. ; Sano, Makoto ; Koyama, Koichi ; Suzuki, Takumi ; Hamashita, K. ; Bang-Sup Song

  • Author_Institution
    Asahi Kasei Microdevices, Atsugi, Japan
  • fYear
    2013
  • Firstpage
    282
  • Lastpage
    283
  • Abstract
    In switched-capacitor circuits like ΔΣ modulators and pipelined ADCs, accurately transferring voltages in sampled-data form, regardless of opamp gain and nonlinearity, has been one of the most challenging issues that analog designers have faced. To date, it has been difficult to achieve high resolution with pipelined ADCs operating at low voltages due to gain and nonlinearity constraints. Digital means of calibration have been suggested to correct opamp nonlinearity, relying on weakly nonlinear transfer functions with coefficients that may need a long time to measure accurately. Alternative types of ADCs that use no opamps, such as successive-approximation, time-domain, and comparator-based designs, have been gaining in popularity. In this paper we implement an inherently exact residue pipelining scheme that is not impaired by opamp gain and nonlinearity. Unlike other calibration methods that sort out errors after they occur, the proposed circuit performs no post analog or digital signal processing, as gain and nonlinearity errors are eliminated entirely at their very sources.
  • Keywords
    analogue-digital conversion; calibration; comparators (circuits); delta-sigma modulation; integrated circuit design; operational amplifiers; pipeline processing; switched capacitor networks; time-domain analysis; transfer functions; ΔΣ modulator; adaptive cancellation; analog design; comparator-based design; digital calibration; gain constraint; gain error; nonlinear transfer function; nonlinearity constraint; nonlinearity error; opamp gain; opamp nonlinearity; pipelined ADC; residue pipelining scheme; successive-approximation design; switched-capacitor circuit; time-domain design; voltage transfer; Bandwidth; Calibration; Capacitance; Noise; Solid state circuits; Switched capacitor circuits; Transfer functions;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2013 IEEE International
  • Conference_Location
    San Francisco, CA
  • ISSN
    0193-6530
  • Print_ISBN
    978-1-4673-4515-6
  • Type

    conf

  • DOI
    10.1109/ISSCC.2013.6487736
  • Filename
    6487736