• DocumentCode
    1706905
  • Title

    Test scheme for switched-capacitor circuits by digital analyses

  • Author

    Wen, Yun-Che

  • Author_Institution
    Dept. of Aeronaut. & Astronaut., Nat. Cheng Kung Univ., Tainan
  • fYear
    2009
  • Firstpage
    132
  • Lastpage
    135
  • Abstract
    This paper proposes a test scheme for measuring the ratio of a pair of capacitors of switched-capacitor (SC) circuits under test (CUT). A specific test signal called step-ramp signal (SRS) is designed. It accurately corresponds to a reference counter. With multiple gains design, a preamplifier following the CUT makes the output of the CUT larger to ensure that the output of the preamplifier is larger than that of the sampled voltage of the SRS inputted to the CUT. The difference between the output of the preamplifier and sampled voltage of the SRS is matched to a set of reference counter output codes. The ratio extracting from the codes can be simply and accurately calculated with digital circuits. This method is suitable to be implemented with Built-In Self-Test (BIST) structure for features on low chip area overhead and short test time. The demonstration is done by Ispice simulation. The accuracy of all ramp pieces of the SRS are within 0.036% and the method gives high accuracy of ratio measurement.
  • Keywords
    SPICE; built-in self test; digital filters; preamplifiers; switched capacitor filters; Ispice simulation; built-in self-test structure; circuit under test; digital circuit analyses; multiple gain design; preamplifier; reference counter; short test time; step-ramp signal; switched-capacitor filter; Built-in self-test; Circuit analysis; Circuit testing; Counting circuits; Digital circuits; Preamplifiers; Signal design; Switched capacitor circuits; Switching circuits; Voltage; Built -In Self-Test (BIST); Design for Testability (DFT); Mixed-Signal Circuits; Switched-Capacitor (SC) Filter;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design and Diagnostics of Electronic Circuits & Systems, 2009. DDECS '09. 12th International Symposium on
  • Conference_Location
    Liberec
  • Print_ISBN
    978-1-4244-3341-4
  • Electronic_ISBN
    978-1-4244-3340-7
  • Type

    conf

  • DOI
    10.1109/DDECS.2009.5012113
  • Filename
    5012113