Calculation limits of the homogeneous effective thermal conductivity approach in modeling of printed circuit board

Electronic components are continuously getting smaller. They embed more and more powered functions which exacerbate the temperature rise in component/board interconnect areas. Their design optimization is henceforth mandatory to control the temperature excess and to preserve component reliability. To allow the electronic designer to early analyze the limits of their power dissipation, an analytical model of a multi-layered electronic board was established with the purpose to assess the validity of conventional board modeling approaches. For decades, a vast majority of authors have been promoting a homogenous single layer model that lumped the layers of the board using effective orthotropic thermal properties. The work presents the thermal behavior comparison between a detailed multi-layer representation and its deducted equivalent lumped model for an extensive set of variable parameters, such as effective thermal conductivities calculation models or source size. The results highlight the fact that the conventional practices for Printed Circuit Board modeling can dramatically underestimate source temperatures when their size is very small.