Title :
A hybrid W-transform-based coding and its VLSI realization for image compression
Author :
Shen-Fu Hsiao ; Wen-Chen Huang ; Chungnan Lee ; Cheng-Chung Hsu
Author_Institution :
Inst. of Comput. & Inf. Eng., Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan
Abstract :
We propose an image compression algorithm that combines the W-transform, normalized quantization, and entropy coding to enhance the compression ratio. Experimental results show that the proposed algorithm achieves a higher compression rate compared to the JPEG and the other previously proposed W-transform based method. Since the W-transform plays an important role in multi-resolution image processing applications and is the core operation in our image compression system, we realize it on a VLSI chip in order to increase the system speed performance. The processor can compute the W-transform of any length (even or odd) in a very high throughput rate using only 8 arithmetic processing elements. The physical design of the processor based on 0.6 /spl mu/m cell library is also included.
Keywords :
VLSI; data compression; digital arithmetic; digital signal processing chips; entropy codes; image coding; image resolution; quantisation (signal); systolic arrays; transform coding; wavelet transforms; 0.6 micron; JPEG; RAM; VLSI; VLSI chip; arithmetic processing elements; cell library; compression ratio; entropy coding; experimental results; high throughput rate; hybrid W-transform-based coding; image compression algorithm; multi-resolution image processing; normalized quantization; system speed performance; systolic architecture; Data compression; Digital arithmetic; Digital signal processors; Entropy codes; Image coding; Image resolution; Quantization; Systolic arrays; Transform coding; Very-large-scale integration; Wavelet transforms;
Conference_Titel :
Consumer Electronics, 1998. ICCE. 1998 Digest of Technical Papers. International Conference on
Conference_Location :
Los Angeles, CA, USA
Print_ISBN :
0-7803-4357-3
DOI :
10.1109/ICCE.1998.678246