Title :
Clocking scheme for switched-capacitor circuits
Author :
Steensgaard, Jesper
Author_Institution :
Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA
Abstract :
A novel clocking scheme for switched-capacitor (SC) circuits is presented. It can enhance the understanding of SC circuits and the errors caused by MOSFET (MOS) switches. Charge errors, and techniques to make SC circuits less sensitive to them, are discussed
Keywords :
clocks; field effect transistor switches; switched capacitor networks; MOSFET switch; charge error; clocking scheme; switched-capacitor circuit; Clocks; Conductivity; Delay; Error correction; Feedback loop; Impedance; MOSFET circuits; Switched capacitor circuits; Switches; Switching circuits;
Conference_Titel :
Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
Conference_Location :
Monterey, CA
Print_ISBN :
0-7803-4455-3
DOI :
10.1109/ISCAS.1998.704509
