DocumentCode :
1708545
Title :
Ultra-wide body-bias range LDPC decoder in 28nm UTBB FDSOI technology
Author :
Flatresse, Philippe ; Giraud, Bastien ; Noel, J. ; Pelloux-Prayer, B. ; Giner, F. ; Arora, D. ; Arnaud, F. ; Planes, N. ; Le Coz, Julien ; Thomas, O. ; Engels, S. ; Cesana, G. ; Wilson, Richard ; Urard, P.
Author_Institution :
STMicroelectron., Crolles, France
fYear :
2013
Firstpage :
424
Lastpage :
425
Abstract :
This paper presents an IEEE 802.11n Low-Density Parity-Check (LDPC) decoder implemented in 28nm Ultra-Thin Body and BOX Fully Depleted SOI (UTBB FDSOI), and demonstrates the performance gains of this circuit vs. 28nm LP high-κ metal-gate CMOS bulk technology. It also introduces extended body bias (BB) design techniques to take advantage of specific features of the UTBB technology to overcome the +/-300mV BB range limitation of conventional bulk technologies [1].
Keywords :
decoding; parity check codes; silicon-on-insulator; wireless LAN; FDSOI technology; IEEE 802.11n; LDPC decoder; UTBB; conventional bulk technologies; extended body bias design techniques; low-density parity-check decoder; performance gains; ultra-thin body and box fully depleted SOI; ultra-wide body-bias range; wavelength 28 nm; Decoding; Electrostatics; Frequency measurement; IEEE 802.11n Standard; Logic gates; Parity check codes;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2013 IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0193-6530
Print_ISBN :
978-1-4673-4515-6
Type :
conf
DOI :
10.1109/ISSCC.2013.6487798
Filename :
6487798
Link To Document :
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