Investigation of EMI coupling at CPU interconnect

Coupling from CPUs can be an issue with respect to products meeting regulatory limits for radiated EMI. This, in turn, can increase the pressure placed on the mechanical design to provide exceptional shielding integrity, while the market continues to drive for less expensive enclosures. Direct coupling from the CPU to external structures may result from interaction with the package, silicon, or the interconnect. Currently, mitigation is often achieved by integrating a shield in the heatsink and bonding the structure to the groundplane of the PCB. However, the trend towards back-biasing to decrease the leakage current may remove the possibility of grounding with the current integrated-heatsink design. This investigation focuses on the possible coupling at the interconnect. The magnetic-field coupling at the interconnect is analyzed numerically and analytically to demonstrate the low impact of this mechanism, and to provide more impetus for mitigation at the CPU package and silicon level.