DocumentCode
1710645
Title
Quad-core media processor SoC with implicative dynamic parallel programming model
Author
Kwon, Young-Su ; Koo, Bon-tae ; Eum, Nak-Woong
Author_Institution
SoC Res. Dept., Electron. & Telecommun. Res. Inst., Daejeon
fYear
2009
Firstpage
1
Lastpage
2
Abstract
The advancement of process technology enables the integration of multiple cores featuring the parallel processing with low operating energy and efficient resource utilization in embedded media processors. We propose mobile media processor SoC integrating RISC core and quad-core data processing engines with shared array of memory modules. The implicative dynamic parallel programming model dynamically distributes the programmer-specified parallelizable functions into multiple cores. The experimental result with parallelized audio processing algorithm on FPGA platform shows the effectiveness of the proposed processor SoC.
Keywords
field programmable gate arrays; microprocessor chips; parallel programming; shared memory systems; system-on-chip; FPGA platform; RISC core data processing engines; efficient resource utilization; embedded media processors; implicative dynamic parallel programming model; low operating energy; mobile media processor; parallelized audio processing algorithm; programmer-specified parallelizable functions; quad-core data processing engines; quad-core media processor SoC; shared memory module array; Chromium; Data processing; Dynamic programming; Engines; Parallel processing; Parallel programming; Programming profession; Reduced instruction set computing; Resource management; Streaming media;
fLanguage
English
Publisher
ieee
Conference_Titel
Consumer Electronics, 2009. ICCE '09. Digest of Technical Papers International Conference on
Conference_Location
Las Vegas, NV
Print_ISBN
978-1-4244-4701-5
Electronic_ISBN
978-1-4244-2559-4
Type
conf
DOI
10.1109/ICCE.2009.5012261
Filename
5012261
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