DocumentCode :
1710884
Title :
Electrical assessment of planarisation for CMP [inter-layer dielectrics]
Author :
Elliott, J.P. ; Fallon, M. ; Walton, A.J. ; Stevenson, J.T.M. ; O´Hara, A. ; Shaffi, A. ; Reeves, C.M.
Author_Institution :
Dept. of Electr. Eng., Edinburgh Univ., UK
fYear :
1997
Firstpage :
85
Lastpage :
90
Abstract :
Experimental measurements of an electrical test structure for use in assessment of the degree of planarisation of inter-layer dielectrics are presented and compared with theoretical predictions. The test structure consists of two sets of metal combs separated by a dielectric. For each structure the combs on the two layers overlap each other by some degree, with adjacent structures having the overlap in one direction progressionally offset by 0.2 μm. It is demonstrated theoretically that the structure is robust to expected levels of oxide thickness variation
Keywords :
capacitance measurement; dielectric thin films; integrated circuit interconnections; integrated circuit testing; polishing; chemical-mechanical polishing; electrical assessment; electrical test structure; inter-layer dielectrics; metal combs; planarisation; Buildings; Capacitance; Dielectric measurements; Electric variables measurement; Integrated circuit interconnections; Planarization; Robustness; Surfaces; Teeth; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronic Test Structures, 1997. ICMTS 1997. Proceedings. IEEE International Conference on
Conference_Location :
Monterey, CA
Print_ISBN :
0-7803-3243-1
Type :
conf
DOI :
10.1109/ICMTS.1997.589345
Filename :
589345
Link To Document :
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