DocumentCode
17122
Title
Architecturally Homogeneous Power-Performance Heterogeneous Multicore Systems
Author
Chakraborty, Koushik ; Roy, Sandip
Author_Institution
Electrical and Computer Engineering Department, Utah State University, Logan, UT, USA
Volume
21
Issue
4
fYear
2013
fDate
Apr-13
Firstpage
670
Lastpage
679
Abstract
Dynamic voltage and frequency scaling (DVFS), a widely adopted technique to ensure safe thermal characteristics while delivering superior energy efficiency, is rapidly becoming inefficient with technology scaling due to two critical factors: 1) inability to scale the supply voltage due to reliability concerns and 2) dynamic adaptations through DVFS cannot alter underlying power hungry circuit characteristics, designed for the nominal frequency. In this paper, we show that DVFS scaled circuits substantially lag in energy efficiency, by 22%–86%, compared to ground up designs for target frequency levels. We propose architecturally homogeneous power-performance heterogeneous multicore systems, a fundamentally alternate means to design energy efficient multicore systems. Using a system level computer-aided design (CAD) approach, we seamlessly integrate architecturally identical cores, designed for different voltage-frequency domains. We use a combination of standard cell library based CAD flow and full system architectural simulation to demonstrate 11%–22% improvement in energy efficiency using our design paradigm.
Keywords
Degradation; Design automation; Logic gates; Multicore processing; Simulated annealing; System-on-a-chip; Threshold voltage; Dynamic voltage frequency scaling (DVFS); energy efficiency; multicore systems;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/TVLSI.2012.2199142
Filename
6213146
Link To Document