DocumentCode
1712743
Title
Design of a high performance FPGA based fault injector for real-time safety-critical systems
Author
Miklo, M. ; Elks, C.R. ; Williams, R.D.
Author_Institution
Charles L. Brown Dept. of Comput. Eng., Univ. of Virginia, Charlottesville, VA, USA
fYear
2011
Firstpage
243
Lastpage
246
Abstract
Fault injection methods have long been used to assess fault tolerance and safety. However, many conventional fault injection methods face significant shortcomings, which hinder their ability to execute fault injections on target real-time safety-critical systems. We demonstrate a novel fault injection system implemented on a commercial Field-Programmable Gate Array board. The fault injector is unobtrusive to the target system as it utilizes only standardized On-Chip-Debugger (OCD) interfaces present on most current processors. This effort resulted in faults being injected orders of magnitude faster than by utilizing a commercial OCD debugger, while incorporating novel features such as concurrent injection of faults into distinct target processors. The effectiveness of this high performance fault injector was successfully demonstrated on a tightly synchronized commercial real-time safety-critical system used in nuclear power applications.
Keywords
fault tolerant computing; field programmable gate arrays; program debugging; safety-critical software; FPGA based fault injector; fault tolerance; field-programmable gate array board; nuclear power applications; on-chip-debugger interfaces; real-time safety-critical systems; Circuit faults; Computers; Field programmable gate arrays; Hardware; Program processors; Real time systems; FPGA; Fault Injection; On-Chip-Debugger Interface;
fLanguage
English
Publisher
ieee
Conference_Titel
Application-Specific Systems, Architectures and Processors (ASAP), 2011 IEEE International Conference on
Conference_Location
Santa Monica, CA
ISSN
2160-0511
Print_ISBN
978-1-4577-1291-3
Electronic_ISBN
2160-0511
Type
conf
DOI
10.1109/ASAP.2011.6043278
Filename
6043278
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