• DocumentCode
    1714051
  • Title

    Multiple fault testing in analog circuits

  • Author

    Hamida, Naim Ben ; Kaminska, Bozena

  • Author_Institution
    Ecole Polytech. de Montreal, Que., Canada
  • fYear
    1994
  • Firstpage
    61
  • Lastpage
    66
  • Abstract
    Analog circuit testing is considered to be a very difficult task. This difficulty is mainly due to the lack of fault models and accessibility to internal nodes. To overcome this problem, an approach is presented for analog circuit testing. The testability of the circuit is analyzed by the multiple fault model and by functional testing. Component deviations are deduced by measuring a number of output parameters, and through sensitivity analysis and tolerance computation. Using this approach, adequate tests are identified for testing catastrophic and soft faults. Some experimental results are presented
  • Keywords
    amplifiers; analogue circuits; graph theory; integrated circuit testing; linear integrated circuits; sensitivity analysis; amplification circuit; analog circuit testing; catastrophic fault testing; circuit testability; defective IC; functional testing; multiple fault testing; sensitivity analysis; soft fault testing; tolerance computation; weighted bipartite graph; Analog circuits; Circuit faults; Circuit simulation; Circuit testing; DH-HEMTs; Equations; Graph theory; Low pass filters; System testing; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, 1994., Proceedings of the Seventh International Conference on
  • Conference_Location
    Calcutta
  • ISSN
    1063-9667
  • Print_ISBN
    0-8186-4990-9
  • Type

    conf

  • DOI
    10.1109/ICVD.1994.282657
  • Filename
    282657