Title :
A fast algorithm for performing vector quantization and its VLSI implementation
Author :
Park, Heonchul ; Prasanna, Viktor K.
Author_Institution :
VLSI Signal Process. Group, Samsung Electron. Co. Ltd., Buchen, South Korea
Abstract :
In this paper, we propose a new tree search algorithm for performing vector quantization (VQ), and a processor and area efficient architecture for implementing it. The proposed algorithm consists of two phases: in the first phase, we perform a fast approximate search without using multiplication. In the second phase, we employ a known tree search algorithm on the neighborhood of the codevector found in the first phase. The size of the search space in the second phase depends on the desired image quality. For obtaining image quality comparable to the known tree (full) search based VQ, the proposed algorithm takes O(klogloglogN) (O(kloglogN)) time units, where N is the number of codevectors and k is the number of dimensions. In the proposed architecture, O(logloglogN) and O(loglogN) processing elements are used to obtain image quality which is comparable to those produced by the known tree search and full search based VQ, respectively. These implementations support real time operations
Keywords :
CMOS integrated circuits; VLSI; digital signal processing chips; image coding; real-time systems; search problems; vector quantisation; VLSI implementation; area efficient architecture; fast algorithm; image quality; real time operations; search based VQ; tree search algorithm; vector quantization; Contracts; Data compression; Decoding; Digital images; Image coding; Image quality; Pixel; Signal processing algorithms; Vector quantization; Very large scale integration;
Conference_Titel :
VLSI Design, 1994., Proceedings of the Seventh International Conference on
Conference_Location :
Calcutta
Print_ISBN :
0-8186-4990-9
DOI :
10.1109/ICVD.1994.282663