DocumentCode :
1714411
Title :
Over-the-cell routing algorithms for industrial cell models
Author :
Bhingarde, Siddharth ; Khawaja, Rafay ; Panyam, Anand ; Sherwani, Naveed A.
Author_Institution :
Microprocessor Div., Intel Corp., Hillsboro, OR, USA
fYear :
1994
Firstpage :
143
Lastpage :
148
Abstract :
The effective utilization of over-the-cell areas for routing leads to minimization or elimination of channel areas in standard cell designs. In this paper, we present two results. Firstly, we develop a new cell model called Target Based Cell (TBC) designs. Standard cells in TBC designs have terminals in the form of vertical segments in M1 layer. The exact locations for placing interconnect contacts on the targets are determined by the routing algorithms. Cell widths in TBC designs are smaller than the widths in existing cell designs and have improved over-the-cell routing flexibility. Secondly, we develop an efficient router for TBC designs which includes two key features; an optimal O(KL) algorithm (where K, and L are number of cell rows and layout width respectively) for assigning over-the-cell area to each channel, so as to minimize total layout height, and an irregular boundary channel HV-HVH-HV router for over-the-cell and channel areas between terminal rows which optimally utilizes the over-the-cell area
Keywords :
VLSI; circuit layout CAD; integrated circuit technology; network routing; IC layout; Target Based Cell (TBC) designs; industrial cell models; interconnect contacts; irregular boundary channel router; optimal O(KL) algorithm; over-the-cell routing algorithms; standard cell designs; Algorithm design and analysis; Benchmark testing; Computer science; Microprocessors; Routing; Standards development;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 1994., Proceedings of the Seventh International Conference on
Conference_Location :
Calcutta
ISSN :
1063-9667
Print_ISBN :
0-8186-4990-9
Type :
conf
DOI :
10.1109/ICVD.1994.282673
Filename :
282673
Link To Document :
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