• DocumentCode
    1714519
  • Title

    Exploring Application-Level Concurrency in SoC Design

  • Author

    Indrusiak, Leandro Soares

  • Author_Institution
    Inst. of Microelectron. Syst., Technische Univ. Darmstadt
  • fYear
    2006
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    As we approach the limits of CMOS technology, novel multiprocessor architectures are the industry´s best shot to keep up with the expectations of the consumer electronics market regarding functionality and performance improvements. While many advances were achieved on efficient concurrent usage of the multiprocessing architectural features, the capturing and exploration of concurrency at the application level is still an open question. This paper will provide an outlook on different concepts and techniques available in modeling frameworks like UML, Matlab/Simulink and Ptolemy II, as well as the features and limitations from concurrent programming and hardware description languages. It will provide details on the most relevant of them and will identify the most likely candidates to be integrated into the design flow that will be used by SoC designers and application developers in the next five to ten years
  • Keywords
    Unified Modeling Language; hardware description languages; integrated circuit design; multiprocessing systems; system-on-chip; CMOS technology; Matlab/Simulink; Ptolemy II; SoC design; UML; application-level concurrency; concurrent programming; hardware description languages; multiprocessor architectures; Automatic programming; CMOS technology; Concurrent computing; Consumer electronics; Electronics industry; Hardware; Mathematical model; Parallel programming; Unified modeling language; Yarn;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    System-on-Chip, 2006. International Symposium on
  • Conference_Location
    Tampere
  • Print_ISBN
    1-4244-0621-8
  • Electronic_ISBN
    1-4244-0622-6
  • Type

    conf

  • DOI
    10.1109/ISSOC.2006.321970
  • Filename
    4116458