Title :
IDDQ measurement based diagnosis of bridging faults in full scan circuits
Author :
Chakravarty, Sreejit ; Suresh, Sivaprakasam
Author_Institution :
Dept. of Comput. Sci., State Univ. of New York, Buffalo, NY, USA
Abstract :
An algorithm for diagnosing two node bridging faults in static CMOS combinational circuits (full scan circuits) is presented. This algorithm uses results from IDDQ testing. The bridging faults considered can be between nodes that are outputs of a gate or internal nodes of gates. Experiments on ISCAS89 circuits show that: IDDQ measurement based diagnosis, using a small number of random vectors, is very effective; and it is computationally feasible to diagnose, using IDDQ measurement, the large number of all bridging faults
Keywords :
CMOS integrated circuits; combinatorial circuits; integrated logic circuits; logic testing; IDDQ testing; ISCAS89 circuits; algorithm; bridging fault diagnosis; full scan circuits; internal nodes; random vectors; static CMOS combinational circuits; two node bridging faults; Artificial intelligence; Circuit faults; Circuit testing; Fault diagnosis; Feedback; Switches; Switching circuits; Variable structure systems;
Conference_Titel :
VLSI Design, 1994., Proceedings of the Seventh International Conference on
Conference_Location :
Calcutta
Print_ISBN :
0-8186-4990-9
DOI :
10.1109/ICVD.1994.282680
