Interconnection Generation for System-on-Chip Design

In recent years interconnection architectures for system-on-chip (SoC) design have been subject of intense research. The architectures range from clustered bus based systems to packet-switched network-on-chips. Thereby, the application of these architectures to systems should not be done by hand but automated. In this paper a system is described which automatically instantiates the network and links the modules to it. The underlying network architecture and the network generation flow are discussed