Title :
Interconnection Generation for System-on-Chip Design
Author :
Winter, Markus ; Fettweis, Gerhard
Author_Institution :
Dresden Univ. of Technol.
Abstract :
In recent years interconnection architectures for system-on-chip (SoC) design have been subject of intense research. The architectures range from clustered bus based systems to packet-switched network-on-chips. Thereby, the application of these architectures to systems should not be done by hand but automated. In this paper a system is described which automatically instantiates the network and links the modules to it. The underlying network architecture and the network generation flow are discussed
Keywords :
integrated circuit interconnections; system-on-chip; systems engineering; interconnection generation; system-on-chip design; Bandwidth; Clocks; Integrated circuit interconnections; Joining processes; Logic; Master-slave; Mobile communication; Network topology; Network-on-a-chip; System-on-a-chip;
Conference_Titel :
System-on-Chip, 2006. International Symposium on
Conference_Location :
Tampere
Print_ISBN :
1-4244-0621-8
Electronic_ISBN :
1-4244-0622-6
DOI :
10.1109/ISSOC.2006.321975
