Design of an application specific VLSI chip for image rotation

Author

Ghosh, Indradeep ; Majumdar, Bandana

Author_Institution

Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Kharagpur, India

fYear

1994

Firstpage

275

Lastpage

278

Abstract

Design of an ASIC chip for on-line rotation of a digital image is reported here. A CORDIC based scheme has been used to compute the displacement of a pixel. In order to achieve high throughput, the complete image frame is divided into windows and a combination of parallel and pipeline architectures has been developed to compute the rotation of individual windows and for computing the final displacement. The chip offers real time rotation of 512×512 pixel image, with a clock frequency greater than 10.6 MHz. The estimated chip area is 211×276 mils²

Keywords

CMOS integrated circuits; VLSI; application specific integrated circuits; digital arithmetic; digital signal processing chips; image processing equipment; parallel architectures; ASIC chip; CMOS standard cells; CORDIC based scheme; application specific VLSI chip; chip area; digital image; high throughput; image rotation; online rotation; parallel architectures; pipeline architecture; pixel displacement; real time rotation; Application specific integrated circuits; Clocks; Computer architecture; Concurrent computing; Digital images; Frequency; Pipelines; Pixel; Throughput; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Design, 1994., Proceedings of the Seventh International Conference on

Conference_Location

Calcutta

ISSN

1063-9667

Print_ISBN

0-8186-4990-9

Type

conf

DOI

10.1109/ICVD.1994.282701

Filename

282701