An X/Ku-band bi-directional true time delay T/R chipset in 0.13 µm CMOS technology

This paper presents an X/Ku-band bi-directional true time delay T/R chipset in 0.13 μm CMOS technology for wideband phased array antenna. The T/R chipset comprises of wideband bi-directional distributed gain amplifiers (BDGA), a 7-bit true time delay (TTD) circuit, and a 6-bit digital step attenuator. The tuning bits are included in TTD (2-bit) and DSA (2-bit) for the amplitude and group delay error correction. The T/R chipset shows the group delay variation of 198.4 ps with the LSB of 1.56 ps. The attenuator coverage of 31.5 dB with the LSB of 0.5 dB is achieved. The gain over -1 dB and the return losses of > 10 dB at 8.0-16.0 GHz are achieved. The gain flatness of T/R chipset is less than 2 dB at 8-16 GHz. The chip size is 2.65 × 1.47 mm2 including pads, and the DC power consumption is 275 mW only from the BDGAs. To authors´ knowledge, this is the first demonstration of the CMOS-based bi-directional TTD T/R chipset at X/Ku-band.