Efficient time domain analogue fault simulation targeting nonlinear circuits

It is presented an efficient single fault simulation methodology for dynamic analogue circuits with nonlinear resistive elements. It is suitable for the simulation-before-test of thousands of faulty circuits, such as when building fault dictionaries. The proposed strategy merges techniques with efficiency already been demonstrated with prototype simulators: one supports nonlinear resistive circuits; and the other supports linear dynamic circuits. The results obtained with these partial implementations, as well as the expected efficiency of the global implementation are discussed. The partial implementations have shown speed-up in fault simulation better than one order of magnitude (in linear dynamic circuits) and better than two orders of magnitude (in nonlinear resistive circuits).