Title :
Clocked and asynchronous instruction pipelines
Author :
Franklin, Mark A. ; Pan, Tienyo
Author_Institution :
Comput. & Commun. Res. Center, Washington Univ., St. Louis, MO, USA
Abstract :
Clocked (synchronous) and self-timed (asynchronous) methodologies represent the two principal design approaches associated with timing control and synchronization of digital systems. In the paper, clocked and asynchronous instruction pipelines are modeled and compared. The approach which yields the best performance is dependent on technology parameters, operating range and pipeline algorithm characteristics. Design curves are presented which permit selection of the best approach for a given application and technology environment
Keywords :
parallel architectures; pipeline processing; asynchronous; clocked; instruction pipelines; self-timed; synchronous; technology environment; timing control; Clocks; Communication system control; Control systems; Delay effects; Digital systems; Hazards; Pipeline processing; Synchronization; Throughput; Timing;
Conference_Titel :
Microarchitecture, 1993., Proceedings of the 26th Annual International Symposium on
Conference_Location :
Austin, TX
Print_ISBN :
0-8186-5280-2
DOI :
10.1109/MICRO.1993.282745
