Scalable modeling of on-chip spiral inductors including metal fill parasitics

We propose a fast and scalable method to model spiral inductors in the presence of metal fill. The method is based on the PEEC technique combined with an extension of methods to incorporate metal fill parasitic effects in spiral inductors. For representative test cases we observe a degradation in peak quality factor of 20 - 30% due to metal fill. The errors in the estimation of peak quality factor are up to 6.0% without metal fill and up to 7.4% with metal fill.