Reliability analysis of MIMO channel preprocessing by fault injection

Reliability of modern MIMO receiver hardware becomes a critical issue due to recent advantages in semiconductor technology and continuous transistor size shrinkage. Most of the research conducted so far, analyzed the impact of solely memory errors on the performance of receivers´ individual components (e.g, decoders) and on the system level performance of the whole receiver in terms of Frame Error Rate (FER). This paper presents the first reliability analysis of critical channel preprocessing block of the receiver. The reliability of individual computational submodules of channel preprocessing is assessed by gate level FPGA-based fault injection. The most unreliable sub-module is identified as the boundary cell, yielding the most performance degradation by introducing the FER floor of 10^-3 for SNR value of 10 dB for very low fault injection rate. Within the boundary cell, the inverse square root is identified as least critical.