Title :
The PowerPC 603 microprocessor: a low-power design for portable applications
Author :
Gary, S. ; Dietz, C. ; Eno, J. ; Gerosa, G. ; Sung Park ; Sanchez, H.
Author_Institution :
Motorola Inc., Austin, TX, USA
Abstract :
The PowerPC 603 microprocessor is a low-power implementation of the PowerPC architecture. The superscalar organization includes dynamic localized shutdown of execution units to reduce normal-mode power consumption. Three levels of static low-power operation are software programmable for system power management. The 603 PLL (phase lock loop) is capable of generating an internal processor clock at 1/spl times/, 2/spl times/, 3/spl times/ or 4/spl times/ the system clock speed to allow control of system power while maintaining processor performance. Various design features optimize the 603 for both power and performance, creating an ideal microprocessor solution for portable applications.<>
Keywords :
IBM computers; clocks; microprocessor chips; phase-locked loops; portable computers; power consumption; PowerPC 603 microprocessor; PowerPC architecture; design features; dynamic localized shutdown; execution units; internal processor clock; low-power design; normal-mode power consumption; phase lock loop; portable applications; processor performance optimization; software programmable static low-power operation levels; superscalar organization; system power control; system power management; Clocks; Computer architecture; Control systems; Energy consumption; Energy management; Microprocessors; Phase locked loops; Power generation; Power system management; Software systems;
Conference_Titel :
Compcon Spring '94, Digest of Papers.
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-8186-5380-9
DOI :
10.1109/CMPCON.1994.282894
