Production test of an RF receiver chain based on ATM combining RF BIST and machine learning algorithm

Testing an RF device in Production is expensive and technically difficult. At Wafer Test level, the RF probing technologies hardly fulfil the industrial test requirements in terms of accuracy, reliability and cost. At Package test level testing the RF parameters requires expensive RF equipments (RF automated test equipments (ATE)) and for complex RF transceivers, which address multi-modes (RF multi-paths and/or requiring different impedance matchings), it usually leads to prohibitive test time. In order to reduce the test costs for RF devices, different methods are proposed and evaluated in NXP and at competitions. These methods mainly target test time reduction (e.g. by testing parts in parallel) or propose ways of limiting the needs of expensive RF tester in Production (e.g. by using Alternate Test Methods, Design For Test, or Built In Test). In the proposed presentation we will focus on ATM and RF BI(s)T, providing some results on DC-RF correlation and an example of a real case BIT implementation into a fully integrated single-chip receiver operating in the sub-GHz ISM bands 315 MHz to 920 MHz.