• DocumentCode
    1718161
  • Title

    DECchip 21066: the Alpha AXP chip for cost-focused systems

  • Author

    McKinney, D. ; Leibholz, D. ; Rosenbluth, M. ; Mullens, J. ; Kwong Chui ; Bhaiwala, M. ; Patel, S. ; Houghton, C. ; Ramey, D.

  • Author_Institution
    Semicond. Eng. Group, Digital Equipment Corp., Hudson, MA, USA
  • fYear
    1994
  • Firstpage
    406
  • Lastpage
    413
  • Abstract
    The DECchip 21066 microprocessor is the first Alpha AXP architecture microprocessor to target cost-focused system applications and the second in a family of chips to implement the Alpha AXP architecture. The 21066 is a 0.675-micron, CMOS-based superscalar, super-pipelined processor using dual instruction issue. It incorporates a high level of system integration to provide best-in-class system performance for low-cost system applications. The 21066 integrates on-chip fully pipelined integer and floating-point processors, a high-bandwidth memory controller, an industry-standard Peripheral Component Interconnect (PCI) I/O controller, graphics-assisting hardware, internal instruction and data caches, and an external cache controller. This paper discusses the tradeoffs and results of the design, verification, and implementation of the 21066.<>
  • Keywords
    CMOS integrated circuits; DEC computers; buffer storage; computer architecture; digital arithmetic; microprocessor chips; pipeline processing; 0.675 micron; Alpha AXP architecture; CMOS-based superscalar super-pipelined processor; DECchip 21066 microprocessor; PCI I/O controller; Peripheral Component Interconnect; cost-focused system applications; design; dual instruction issue; external cache controller; floating-point processor; graphics assisting hardware; high-bandwidth memory controller; implementation; integer processor; internal data cache; internal instruction cache; on-chip fully pipelined processors; system integration; system performance; verification; Bandwidth; CMOS technology; Central Processing Unit; Clocks; Cost function; Electrical equipment industry; Microcomputers; Microprocessors; Personal communication networks; Phase locked loops;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Compcon Spring '94, Digest of Papers.
  • Conference_Location
    San Francisco, CA, USA
  • Print_ISBN
    0-8186-5380-9
  • Type

    conf

  • DOI
    10.1109/CMPCON.1994.282899
  • Filename
    282899