A 5 GHz continuous time sigma-delta modulator implemented in 0.4 μm InGaP/InGaAs HEMT technology

The design of a second-order continuous-time sigma-delta (ΣΔ) modulator working at a sampling rate of 5 GHz and implemented on a 0.4 μm InGaP/InGaAs HEMT technology is described. A new polarity alternating feedback (PAF) technique is described and applied to the design of a high sampling frequency comparator. The fully differential architecture adopted for the modulator includes the PAF comparator and pairs of highly linear V-I converters, high-speed op amps, and high-speed 1-bit DAC units. At a sampling rate of 4.9 GHz and a signal bandwidth of 100 MHz, the circuit achieves 43 dB signal-to-noise ratio (SNR), which is equivalent to 7.2 bits resolution. The modulator occupies an total area of 0.9 mm² dissipating 400 mW from a 3.2 V power supply. The exceptional performance we attained corresponds to the highest sampling rate and lowest power consumption for an oversampled A/D converter in III-V technology known to us