DocumentCode :
1718728
Title :
Figures of merit for class AB input stages
Author :
Palumbo, Gaetano ; Pennisi, Melita ; Carvajal, Ramon G.
Author_Institution :
Dipt. di Ing. Elettr., Elettron. ed Inf., Univ. degli Studi di Catania, Catania, Italy
fYear :
2011
Firstpage :
749
Lastpage :
752
Abstract :
Three representative class AB Current Mirror OTAs are analytically compared in term of the trade-off speed, current consumption and area. The approach presented allows to derive useful design guidelines. The analysis was validated by means of simulations considering a 90 nm CMOS technology.
Keywords :
CMOS integrated circuits; current mirrors; operational amplifiers; CMOS technology; class AB input stages; current mirror OTA; figures of merit; size 90 nm; CMOS integrated circuits; Guidelines; Inspection; Mirrors; Power supplies; Q factor; Topology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuit Theory and Design (ECCTD), 2011 20th European Conference on
Conference_Location :
Linkoping
Print_ISBN :
978-1-4577-0617-2
Electronic_ISBN :
978-1-4577-0616-5
Type :
conf
DOI :
10.1109/ECCTD.2011.6043652
Filename :
6043652
Link To Document :
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