Title :
A half-power rating improved 3-phase six-switch boost rectifier using two half controlled configurations with a common DC bus
Author :
Panda, Debiprasad ; Lipo, Thomas A.
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Wisconsin-Madison, Madison, USA
Abstract :
An improved 3-phase isolated controlled rectifier with unity power factor interface and sinusoidal current waveforms is proposed in this paper. The power ratings of the active devices are reduced to half the rated power of the rectifier. The proposed rectifier consists of two complementary isolated half controlled circuits connected to a common DC bus. A 3-phase transformer with one primary and two complementary secondary windings is employed at the AC side for electrical isolation between the source and the load as well as between the two half controlled rectifiers. In addition to functioning as rectifiers, the two complementary circuits act as an active filter for each other in order to eliminate the low order harmonics both in the AC and DC sides. A simple cross-coupled control algorithm has been proposed in order to realize the above scheme. The proposed rectifier is shoot-through safe, requires single power supply for its gate drives and operates with higher efficiency. The higher efficiency is achieved due to lower switching losses since the switches carry only 50% of the rated current. The proposed topology has been studied for future implementation on a 40 kW rectifier using SABER and the simulation results are presented. The proposed topology will provide distinct advantages in terms of cost and ruggedness of the system compared to existing regular six switch inverters.
Keywords :
active filters; harmonics suppression; losses; power conversion harmonics; power factor; rectifying circuits; switching convertors; transformers; waveform generators; 3-phase isolated controlled rectifier; 3-phase six-switch boost rectifier; 40 kW; AC electrical isolation; DC bus; SABER; active filter; complementary isolation transformer; cross-coupled control algorithm; efficiency; gate drive; half-power rating active devices; low order harmonics; power supply; primary winding; secondary winding; shoot-through free leg structure; sinusoidal current waveform; six switch inverters; switching losses; system cost; system ruggedness; topology; unity power factor interface; Active filters; Circuits; Costs; Power harmonic filters; Power supplies; Reactive power; Rectifiers; Switches; Switching loss; Topology;
Conference_Titel :
Power Electronics Specialist Conference, 2003. PESC '03. 2003 IEEE 34th Annual
Print_ISBN :
0-7803-7754-0
DOI :
10.1109/PESC.2003.1216598